THIS COURSE TEACHES THE APPLICATION OF GATES AND FLIPFLOPS
IT ALSO INTRODUCES US TO INTERFACING
- LECTURER: Alice Oke
Embedded System is a microprocessor based system that is embedded as a subsystem, in a larger system for the purpose of monitoring and control.
This course provides comprehensive Introduction to Embedded System design and applications. It provides a broad and in-depth overview of important topics ranging from Computer Architecture and Operating System, electronic design automation and brief manufacturing guidelines. It is a course intended for Senior Undergraduate students in Computer Science and Engineering, as well as those interested in making Embedded System their profession.
Fault-tolerant computing (FTC) is the art and science of building computing systems that continue to operate satisfactorily in the presence of faults. FTC systems research covers a wide spectrum of applications ranging across embedded real-time systems, commercial transaction systems, transportation systems, and military/space systems
In this course you will learn basic concepts in FTC such as Hardware Fault-Tolerance, fault masking, error coding and correction, Dynamic recovery, Software Fault-Tolerance, etc.
You will also under classes of FTC systems such as Long-Life, Unmaintained Computers, Ultradependable Real-Time Computers and High-Availability Computers.
Research papers will also be reviewed by students for better understanding of FTC.
This course teaches methods and methodlogies for evaluating computing system performance.
THIS COURSE TEACHES THE ARCHITECTURE OF A NAMED MICROPROCESSOR AND THE PROGRAMMING OF THE PROCESSOR.
IT ALSO TEACHES MEMORY, INPUT/OUTPUT DEVICES AND THEIR INTERCONNECTIONS TO THE MICROPROCESSOR.
-- Dr R. A. Ganiyu
- Teacher: DR O.T. ARULOGUN
This Course Teaches Introduction To Computer Networking
- Lecturer: Olawunmi Sulaimon
This course aims to provide a sound foundation for students to understand modern computer system
architecture and to apply these principles to future computer designs. The course
is structured around the three mainbuilding blocks of general-purpose computing systems: processors,
memories, and networks.
The first half of the course focuses on the fundamentals of each building block. Topics include
instruction set architecture; single-cycle, FSM, and pipelined processor microarchitecture; directmapped
vs. set-associative cache memories; memory protection, translation, and virtualization; FSM
and pipelined cache microarchitecture; cache optimizations; network topology and routing; buffer,
channel, and router microachitecture; and integrating processors, memories, and networks. The
second half of the course delves into more advanced techniques and will enable students to understand
how these three building blocks can be integrated to build a modern shared-memory multicore
system. Topics include superscalar execution, out-of-order execution, register renaming, memory
disambiguation, branch prediction, and speculative execution; multithreaded, VLIW, and SIMD processors;
non-blocking cache memories; and memory synchronization, consistency, and coherence.
Students will learn how to evaluate design decisions in the context of past, current, and future application
requirements and technology constraints.
At the end of this course, students should be able to:
• describe computer architecture concepts and mechanisms related to the design of modern
processors, memories, and networks and explain how these concepts and mechanisms interact.
• apply this understanding to new computer architecture design problems within the context of
balancing application requirements against technology constraints; more specifically,
quantitatively assess a design’s execution time in cycles and qualitatively assess a design’s
cycle time, area, and energy.
• evaluate various design alternatives and make a compelling quantitative and/or qualitative
argument for why one design is superior to the other approaches.
• demonstrate the ability to implement and verify designs of varying complexity at the
• create new designs at the register-transfer-level and the associated effective testing strategies.
• write concise yet comprehensive technical reports that describe designs implemented at the
register-transfer-level, explain the testing strategy used to verify functionality, and evaluate the
designs to determine the superior approach.